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projects:electronics:stm32:stm32u0_notes [2025/03/29 07:30] – [Native USB (STM32U073, STM32U083)] Note about HCLK - still works in DFU. Andrew Yongprojects:electronics:stm32:stm32u0_notes [2025/03/30 09:33] (current) – [Choosing an LSE Crystal] redundant "substitute" typo Andrew Yong
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   - **Hardware**   - **Hardware**
-    - Choose a **crystal oscillator**(([[https://www.st.com/resource/en/application_note/an2867-guidelines-for-oscillator-design-on-stm8afals-and-stm32-mcusmpus-stmicroelectronics.pdf|AN2867 Guidelines for oscillator design on STM8AF/AL/S and STM32 MCUs/MPUs]], §5.2: STM32-compatible low-speed resonators, Table 7: Recommended crystal / MEMS resonators for the LSE oscillator in STM32 products))+    - Choose a **32.768 kHz crystal oscillator**(([[https://www.st.com/resource/en/application_note/an2867-guidelines-for-oscillator-design-on-stm8afals-and-stm32-mcusmpus-stmicroelectronics.pdf|AN2867 Guidelines for oscillator design on STM8AF/AL/S and STM32 MCUs/MPUs]], §5.2: STM32-compatible low-speed resonators, Table 7: Recommended crystal / MEMS resonators for the LSE oscillator in STM32 products)) 
 +      * JLCPCB basic part: [[https://jlcpcb.com/partdetail/SeikoEpson-Q13FC13500004/C32346|Seiko Epson FC-135 32.768 KHz 12.5 pF ±20 ppm]]
     - Choose the **load capacitance**     - Choose the **load capacitance**
       * C1 = C2 = 2 * (C<sub>L</sub> - C<sub>stray</sub>)       * C1 = C2 = 2 * (C<sub>L</sub> - C<sub>stray</sub>)
       * "Stray capacitance C<sub>stray</sub> comes from the pins of the chip and parasitics from the board. It is often approximated as 5pF."(([[https://microchip.my.site.com/s/article/Calculating-crystal-load-capacitor|Calculating crystal load capacitor]]))       * "Stray capacitance C<sub>stray</sub> comes from the pins of the chip and parasitics from the board. It is often approximated as 5pF."(([[https://microchip.my.site.com/s/article/Calculating-crystal-load-capacitor|Calculating crystal load capacitor]]))
   - **Software**   - **Software**
-    - Configure **LSE drive level**: ''%%__HAL_RCC_LSEDRIVE_CONFIG%%(//%%__LSEDRV__%%//)''; Select the lowest value that can provide robust LSE start-up((RM0503, §5.2.6: LSE clock))\\ Substitute ''//%%__LSEDRV__%%//'' substitute with:+    - Configure **LSE drive level**: ''%%__HAL_RCC_LSEDRIVE_CONFIG%%(//%%__LSEDRV__%%//)''; Select the lowest value that can provide robust LSE start-up((RM0503, §5.2.6: LSE clock))\\ Substitute ''//%%__LSEDRV__%%//'' with:
       - ''RCC_LSEDRIVE_LOW''       - ''RCC_LSEDRIVE_LOW''
       - ''RCC_LSEDRIVE_MEDIUMLOW'' (default if ''%%__HAL_RCC_LSEDRIVE_CONFIG%%'' is not called)       - ''RCC_LSEDRIVE_MEDIUMLOW'' (default if ''%%__HAL_RCC_LSEDRIVE_CONFIG%%'' is not called)
       - ''RCC_LSEDRIVE_MEDIUMHIGH''       - ''RCC_LSEDRIVE_MEDIUMHIGH''
       - ''RCC_LSEDRIVE_HIGH''       - ''RCC_LSEDRIVE_HIGH''
projects/electronics/stm32/stm32u0_notes.1743233425.txt.gz · Last modified: 2025/03/29 07:30 by Andrew Yong

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