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STM32U0 Notes

Literature

Development Boards

Operating Conditions

  • VDDx
    • 1.71 ≤ VDDx ≤ 3.60 V (absolute maximum: 4.00 V)
    • Nucleo-083RC LEDs become very dim when 3.3V net falls below 1.80 V
  • Brownout Reset1)
    • Selectable: 1.7, 2.0, 2.2, 2.5 or 2.8 V

Native USB (STM32U073, STM32U083)

In order to use the native USB for programming on pins PA11 and PA12, the following settings must be done in STM32CubeProgrammer → Option bytes → User Configuration.

Option byte name Value Description Notes
NBOOT_SEL 0 (Unchecked) BOOT0 pin (legacy mode) :!: Factory setting is 1. You must change it to 0 to keep USB DFU programming capability. :!:
nBOOT1 1 (Checked) Boot from Flash if BOOT0 = 1, otherwise System Memory This is the factory setting
NRST_MODE 1 or 3 1: Reset input only
3. Bidirectional reset: The NRST pin is configured in reset input/output (legacy) mode
3 is the factory setting

:!: Note: Native USB does not enumerate if HCLK is lower than the default 16 MHz, e.g. by adjusting the AHB prescaler.

STM32duino LowPower & RTC

State Peripherals Memory Voltage Supplies (VDDx) STM32RTC::LSI_CLOCK STM32RTC::LSE_CLOCK :!: STM32RTC::HSE_CLOCK :!:
LowPower.idle() On On On Supported Supported Supported
LowPower.sleep() On On On Supported Supported Supported
LowPower.deepSleep() On On On Supported Supported Supported
LowPower.shutdown() :!: Off Off Off Supported

:!:: External hardware required

Prerequisites for LowPower.shutdown()

  • External 32.768 kHz crystal for LSE2)
  • rtc.setClockSource(STM32RTC::LSE_CLOCK);
    rtc.begin();

Choosing an LSE Crystal

  1. Hardware
    1. Choose a crystal oscillator3)
    2. Choose the load capacitance
      • C1 = C2 = 2 * (CL - Cstray)
      • “Stray capacitance Cstray comes from the pins of the chip and parasitics from the board. It is often approximated as 5pF.”4)
  2. Software
    1. Configure LSE drive level: __HAL_RCC_LSEDRIVE_CONFIG(__LSEDRV__); Select the lowest value that can provide robust LSE start-up5)
      Substitute __LSEDRV__ substitute with:
      1. RCC_LSEDRIVE_LOW
      2. RCC_LSEDRIVE_MEDIUMLOW (default if __HAL_RCC_LSEDRIVE_CONFIG is not called)
      3. RCC_LSEDRIVE_MEDIUMHIGH
      4. RCC_LSEDRIVE_HIGH
1)
RM0503, §3.7.7: FLASH option register (FLASH_OPTR), Bits 10:8 BOR_LEV[2:0]: BOR reset level
2)
DS14581/DS14548/DS14463, §6.3.7: External clock source characteristics, Low-speed external clock generated from a crystal resonator
3)
AN2867 Guidelines for oscillator design on STM8AF/AL/S and STM32 MCUs/MPUs, §5.2: STM32-compatible low-speed resonators, Table 7: Recommended crystal / MEMS resonators for the LSE oscillator in STM32 products
5)
RM0503, §5.2.6: LSE clock
projects/electronics/stm32/stm32u0_notes.1743232280.txt.gz · Last modified: 2025/03/29 07:11 by Andrew Yong